The present invention relates to a circuit for executing a logic operation by a novel mechanism, or more particularly to a quantum circuit capable of performing digital processing and suitably used with an ultra-high density logic operation circuit.
Since the invention of a semiconductor integrated circuit initiated by the planer technique in 1959, the progress of the Si or GaAs LSI (Large Scale Integration) technique has been very conspicuous. The demand for faster and faster computing architectures has been met by improvements in the manufacturing processes allowing integrated circuits to be scaled to smaller and smaller dimensions. The decrease in size of the circuits has led to increasing switching speeds and increasing total processing power per unit of area. In effect, conventional architecture has generally improved device performance by reducing the size of devices.
However, in some instances (for example the case of an Si MOS memory of 64 megabit DRAM) while the memory cell size has been reduced to as small as 1 μm2, further integration is troublesome due to the difficulty in wiring. Alternatively, high levels of integration have led to problems of heat generation and heat dissipation. For example, highly integrated Si bipolar ECL (Emitter Coupled Logic) circuits are seriously hampered by the problem of heat generation. Thus, the conventional architecture of highly integrated devices is facing a limit with respect to high integration.
In effect, the concept of improving performance through increasing integration seems to be reaching a practical limit for the typical implementations of circuits. As such, there is a need to provide a different circuit architecture that permits continued integration, efficient construction, and faster performance. The present novel technology addresses this need.